1. Field of the Invention
The present invention relates to direct sequence spread spectrum communications, and more particularly, to a radio receiver that conserves electrical power by performing certain processing of received data only during a narrow window corresponding to an estimated bit synchronization time.
2. Description of Related Art
Spread spectrum modulation techniques are increasingly desirable for communications, navigation, radar and other applications. In a spread spectrum system, the transmitted signal is spread over a frequency band that is significantly wider than the minimum bandwidth required to transmit the information being sent. As a result of the signal spreading, spread spectrum systems have reduced susceptibility to interference or jamming, and enable high data integrity and security. Moreover, by spreading transmission power across a broad bandwidth, power levels at any given frequency within the bandwidth are significantly reduced, thereby reducing interference to other radio devices. In view of these significant advantages, spread spectrum communication systems are highly desirable for commercial data transmission.
In one type of spread spectrum communication system, a radio frequency (RF) carrier is modulated by a digital code sequence referred to as a spreading code. The spreading code has a bit rate, or chipping rate, much higher than a clock rate of the underlying information signal. These spread spectrum systems are known as direct sequence (DS) or code division multiple access (CDMA) modulation systems. The RF carrier may be binary or quadrature modulated by one or more data streams such that the data streams have one phase when the spreading code represents a data "one" and a predetermined phase shift (e.g., 180.degree. for binary, and 90.degree. for quadrature) when the spreading code represents a data "zero." These types of modulation are commonly referred to as binary shift key (BPSK) and quadrature shift key (QPSK) modulation, respectively.
It is also known to use a plurality of CDMA radio receivers that are coupled together in a wireless local area network (WLAN). A central host processing unit could send information to and receive information from any one of the plurality of remotely disposed receivers. In such a WLAN, the remote receivers may comprise portable units that operate within a defined environment to report information back to the central host processing unit. Each of the remote receivers would communicate with the host processing unit using the same RF carrier frequency and spreading code. It should be apparent that such WLAN systems offer increased flexibility over hard-wired systems by enabling operators of the remote receivers substantial freedom of movement through the environment.
Each individual CDMA radio receiver amplifies and filters an RF signal transmitted from the host processing unit to remove the RF carrier and provide a digital information signal that has been modulated by the spreading code. The receiver then "de-spreads" the digital signal in a digital processing stage that includes a digital matched filter correlated with the spreading code to remove the modulation and recover the digital information. Tracking and bit synchronization logic units synchronize the timing of the digital matched filter to the received signal by generating a data output containing despread digital information recovered from the received signal and a regulated clock output to which the data output is synchronized. Thereafter, the digital information is combined into packets having a predefined format and length. The packets can then be processed subsequently by use of conventional data processing logic systems, such as a microprocessor, digital signal processor, and the like.
A drawback with such wireless systems is the limited power source of the remote receivers. To maximize flexibility and freedom of movement, the remote receivers often include a rechargeable battery system. When not in use, the remote receivers could be plugged into a recharging station that restores the battery system to a fully charged state. Nevertheless, such battery systems necessarily increase the weight and bulk of the remote radio receivers, as a heavier battery system would provide greater storage capacity and longer operational life. Radio system designers must trade off weight of the receiver against its operational life, and have long sought ways to reduce the power requirements of a remote receiver in order to further extend the operational life without having to increase the battery system capacity.
Thus, it would be desirable to provide a remote CDMA radio receiver that draws reduced electrical current in order to maximize operational life between charging cycles. Since the digital signal processing circuitry that performs the de-spreading, tracking and bit synchronization of the received signals draws a substantial amount of electrical power, power usage could be reduced by improving the efficiency of the digital processing circuitry.